RTL Verification Engineer

Vertical Compute is a pioneering company backed by significant funding, dedicated to overcoming memory bottlenecks in AI hardware through proprietary Vertical Integrated Memory (VIM) chiplets. We are seeking an experienced RTL Verification Engineer to lead the top-level verification of our next-generation 3D-integrated chiplets, ensuring they meet the highest standards of performance and reliability.

Key responsibilities

• Lead top-level functional verification for our next-generation AI compute chiplet, ensuring complete protocol compliance and robust multi-die integration.
• Architect, deploy, and maintain advanced UVM/SystemVerilog testbenches, assertions, and constrained-random test plans for memory and compute subsystems.
• Drive coverage-driven verification, target debug, and root-cause analysis across complex hardware-software boundary scenarios.
• Collaborate closely with Front-End RTL Design, System Architecture, and Software teams to achieve full tape-out readiness and post-silicon validation.
• Benchmark and analyze system-level performance to demonstrate the throughput, bandwidth, and energy efficiency of our VIM technology.

Requirements

• Proven track record in ASIC/SoC functional verification, including top-level verification of complex multi-IP designs or AI compute accelerators.
• Degree in Electrical Engineering, Computer Engineering, Microelectronics, or a related discipline.
• Strong expertise in SystemVerilog, UVM, assertion-based verification, and coverage-driven verification for complex hardware architectures.
• Strong collaborative mindset and problem-solving skills to work effectively with cross-functional teams.
• Fluency in English with excellent written and verbal communication skills.

What we offer

• Opportunity to work on cutting-edge semiconductor technology that powers the next era of AI compute.
• Collaborative environment working with cross-functional engineering groups to deliver innovative memory solutions.