Expert Logic Design Engineer (FPGA/ASIC)

DCV Technologies is seeking an Expert Logic Design Engineer to join an advanced R&D project focused on developing FPGA- and ASIC-based control and measurement systems for quantum computing. You will take technical ownership of complex, high-performance digital subsystems, ensuring deterministic timing and low latency in next-generation hardware.

Key responsibilities

• Lead digital architecture, microarchitecture, and SystemVerilog RTL implementation.
• Design configurable, ultra-low-latency digital logic and reusable IP.
• Drive design processes from initial specification through synthesis, timing closure, and final integration.
• Optimize clocking, CDC, resource utilization, power consumption, and critical paths.
• Collaborate closely with verification, software, and hardware engineering teams to guide technical decisions and design reviews.

Requirements

• Minimum of 6 years of professional experience in FPGA/ASIC digital logic design.
• Expert-level proficiency in hands-on SystemVerilog RTL design.
• Proven track record of owning complex digital IP from specification to implementation.
• Advanced knowledge of synthesis, Static Timing Analysis (STA), timing closure, and Clock Domain Crossing (CDC).
• Strong background in digital architecture and microarchitecture, supported by confident English communication skills.

What we offer

• Opportunity to work on cutting-edge quantum computing instrumentation.
• Full technical ownership of high-performance digital subsystems.
• Collaborative environment with cross-functional engineering teams.
• Professional growth through complex, high-stakes R&D projects.