Coherency Verification Engineer

TechBiz Global is currently seeking a highly skilled Coherency Verification Engineer to join the team of one of our top-tier clients. This role offers an excellent opportunity to work on complex digital designs within an innovative and fast-paced environment, focusing on advanced system-level verification.

Key responsibilities

• Verify complex digital designs at the RTL level in accordance with architecture and design specifications.
• Develop and maintain robust verification environments utilizing SystemVerilog and UVM methodologies.
• Create, execute, and debug comprehensive test plans for block-level, subsystem-level, and top-level verification.
• Validate designs involving the CHI protocol, cache structures, coherency mechanisms, and complex system-level interactions.
• Collaborate closely with architecture, design, and verification teams to analyze specifications and resolve technical issues.

Requirements

• Master or PhD degree in a relevant technical field.
• Over 8 years of industrial experience in digital design verification.
• Proficiency in SystemVerilog and UVM, with deep knowledge of the CHI protocol.
• Proven experience in the verification of coherent systems and cache structures.
• Strong command of scripting languages such as Python, Perl, Bash, or TCL for automation.
• Excellent communication skills in English at a C1 level.

What we offer

• The opportunity to work on cutting-edge technology projects for industry-leading clients.
• A fully remote working environment that supports professional growth and technical excellence.
• Collaboration with highly experienced engineering teams in a collaborative and innovative culture.